Synopsys users are invited to register for the IP Track at SNUG Silicon Valley. The IP track, consisting of five technical tutorials, is focused on how you can easily integrate silicon-proven IP into your SoCs with less risk across a wide range of applications.

• Building Secure Media Processors for Connected Homes Using OTP NVM

• Enabling 400G Hyperscale Data Centers with 56G Ethernet PHY IP

• Using IP for LPDDR5/4/4X Connectivity and Memory Performance Optimization

• Implementing Monocular Visual SLAM for Augmented Reality in Low-Power Embedded Vision Systems

• Accelerate Your Move to 32GT/s PCI Express 5.0 Designs

Also, don’t miss the following related sessions:

• Enabling AI with IP

• Test and Repair for SoC Memories and Hierarchical Test for AMS & PHY IP

• Enabling Automotive-Quality Embedded Memories: Design and Test Enhancements

• The Marriage of AI and Safety in Automotive SoCs